Tags: MOSFET

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Description

The metal–oxide–semiconductor field-effect transistor is a device used for amplifying or switching electronic signals. In MOSFETs, a voltage on the oxide-insulated gate electrode can induce a conducting channel between the two other contacts called source and drain. The channel can be of n-typeor p-type, and is accordingly called an nMOSFET or a pMOSFET (also commonly nMOS, pMOS). It is by far the most common transistor in both digital and analog circuits, though the bipolar junction transistor was at one time much more common. More information on MOSFET can be found here.

Resources (141-153 of 153)

  1. MSE 376 Lecture 13: Nanoscale CMOS, part 2

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    Online Presentations | 31 Mar 2007 | Contributor(s):: Mark C. Hersam

  2. MSE 376 Lecture 12: Nanoscale CMOS, part 1

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    Online Presentations | 31 Mar 2007 | Contributor(s):: Mark C. Hersam

  3. Illinois Tools: MOCA

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    Tools | 28 Mar 2007 | Contributor(s):: Mohamed Mohamed, Umberto Ravaioli, Nahil Sobh, derrick kearney, Kyeong-hyun Park

    2D Full-band Monte Carlo (MOCA) Simulation for SOI-Based Device Structures

  4. MOSCNT: code for carbon nanotube transistor simulation

    3.5 out of 5 stars 

    Downloads | 14 Nov 2006 | Contributor(s):: Siyu Koswatta, Jing Guo, Dmitri Nikonov

    Ballistic transport in carbon nanotube metal-oxide-semiconductor field-effect transistors (CNT-MOSFETs) is simulated using the Non-equilibrium Green’s function formalism. A cylindrical transistor geometry with wrapped-around gate and doped source/drain regions are assumed. It should be noted that...

  5. Nanoscale MOSFETs: Physics, Simulation and Design

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    Papers | 26 Oct 2006 | Contributor(s):: Zhibin Ren

    This thesis discusses device physics, modeling and design issues of nanoscale transistors at the quantum level. The principle topics addressed in this report are 1) an implementation of appropriate physics and methodology in device modeling, 2) development of a new TCAD (technology computer aided...

  6. nanoMOS 2.0: A Two -Dimensional Simulator for Quantum Transport in Double-Gate MOSFETs

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    Papers | 06 Oct 2006 | Contributor(s):: Zhibin Ren, Ramesh Venugopal, Sebastien Goasguen, Supriyo Datta, Mark Lundstrom

    A program to numerically simulate quantum transport in double gate MOSFETs is described. The program uses a Green’s function approach and a simple treatment of scattering based on the idea of so-called Büttiker probes. The double gate device geometry permits an efficient mode space approach that...

  7. Modeling Interface-defect Generation (MIG)

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    Tools | 18 Jul 2006 | Contributor(s):: Ahmad Ehteshamul Islam, HALDUN KUFLUOGLU, Muhammad A. Alam

    Analyzes device reliability based on NBTI

  8. NanoMOS

    3.5 out of 5 stars 

    Tools | 19 May 2006 | Contributor(s):: , Sebastien Goasguen, Akira Matsudaira, Shaikh S. Ahmed, Kurtis Cantley, Yang Liu, Yunfei Gao, Xufeng Wang, Mark Lundstrom

    2-D simulator for thin body (less than 5 nm), fully depleted, double-gated n-MOSFETs

  9. MOSFet

    4.5 out of 5 stars 

    Tools | 30 Mar 2006 | Contributor(s):: Shaikh S. Ahmed, Saumitra Raj Mehrotra, SungGeun Kim, Matteo Mannino, Gerhard Klimeck, Dragica Vasileska, Xufeng Wang, Himadri Pal, Gloria Wahyu Budiman

    Simulates the current-voltage characteristics for bulk, SOI, and double-gate Field Effect Transistors (FETs)

  10. Fabrication of a MOSFET within a Microprocessor

    4.5 out of 5 stars 

    Animations | 16 Nov 2005 | Contributor(s):: John C. Bean

    This resource depicts the step-by-step process by which the transistors of an integrated circuit are made.

  11. FETToy 2.0 Source Code Download

    3.5 out of 5 stars 

    Downloads | 09 Mar 2005

    FETToy 2.0 is a set of Matlab scripts that calculate the ballistic I-V characteristics for a conventional MOSFETs, Nanowire MOSFETs and Carbon NanoTube MOSFETs. For conventional MOSFETs, FETToy assumes either a single or double gate geometry and for a nanowire and nanotube MOSFETs it assumes a...

  12. Faster Materials versus Nanoscaled Si and SiGe: A Fork in the Roadmap?

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    Online Presentations | 20 Apr 2004 | Contributor(s):: Jerry M. Woodall

    Strained Si and SiGe MOSFET technologies face fundamental limits towards the end of this decade when the technology roadmap calls for gate dimensions of 45 nm headed for 22 nm. This fact, and difficulties in developing a suitable high-K dielectric, have stimulated the search for alternatives to...

  13. Nanoelectronics and the Future of Microelectronics

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    Online Presentations | 22 Aug 2002 | Contributor(s):: Mark Lundstrom

    Progress in silicon technology continues to outpace the historic pace of Moore's Law, but the end of device scaling now seems to be only 10-15 years away. As a result, there is intense interest in new, molecular-scale devices that might complement a basic silicon platform by providing it...