Tags: FPGA

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  1. Vivek Adi

    https://nanohub.org/members/383437

  2. MATLAB R2021a

    Tools | 09 Sep 2021 | Contributor(s):: Gen Sasaki, Lisa Kempler

    MATLAB is a programming and numeric computing platform to analyze data, develop algorithms, and create models.

  3. Qazi Shahid Ullah

    https://nanohub.org/members/322959

  4. Christian Cabrera

    https://nanohub.org/members/307730

  5. Ajjay S Gaadhe

    https://nanohub.org/members/300022

  6. Starter Codes for Purdue-P Coprocessor

    Downloads | 27 Apr 2020 | Contributor(s):: Lakshmi Anirudh Ghantasala, Brian Sutton, Kerem Yunus Camsari, Risi Kumar Jaiswal, Supriyo Datta

    Included are MATLAB codes that run sample problems on the All-to-all, Nearest Neighbor, and Quantum  Annealing topologies on the Purdue-P Coprocessor. Supporting image files are also included.

  7. Arijit Sengupta

    A motivated individual with an aptitude in leading and managing teams for projects and related work. My goal is to become associated with a company or an university where I can utilize my skills to...

    https://nanohub.org/members/209943

  8. S Kiran Kadam

    https://nanohub.org/members/172030

  9. Timothy W. Kilmer

    https://nanohub.org/members/169238

  10. Sai Kiran Kadam

    https://nanohub.org/members/147551

  11. Johnson Andrade

    https://nanohub.org/members/125925

  12. Farshid Hajhashemi

    https://nanohub.org/members/73368

  13. Graphene Switch Box

    Tools | 01 Apr 2009 | Contributor(s):: Sansiri Tanachutiwat, wei wang

    Graphene Switch Box for FPGA Interconnects

  14. Renaud DAVIOT

    __Researcher at [http://inl.cnrs.fr/ INL]__[[BR]]Reconfigurable digital cells with CNT, Nanowires, molecular devices[[BR]]__Teaching at [http://www.cpe.fr/ CPE Lyon] (France)__[[BR]]FPGA, VHDL,...

    https://nanohub.org/members/26856

  15. MEST Fundamentals of Digital IC Design: From RTL to GDSII

    Courses|' 16 Aug 2023

    Full Understanding of the Digital IC Design Flow and the Entire Transformation Process of Taking the Design from RTL to final bitstream on FPGA and GDSII on ASIC. The course includes hands on...

    https://nanohub.org/courses/MEST_FDICD