Compact Solver for Double-Gate Tunnel-FETs

Plotting of DC and AC characteristics of DG-Tunnel-FETs using equations of the corresponding Verilog-A compact model THM-TFET.

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Archive Version 1.0
Published on 29 Mar 2021
Latest version: 1.1. All versions

doi:10.21981/Z76A-SQ79 cite this

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Abstract

This tool allows plotting of DC and AC characteristics of a double-gate Tunnel-FET using the equations of the corresponding Verilog-A compact model THM-TFET. The compact model allows the user to simulate circuits with Tunnel-FETs in DC, AC or transient mode using a conventional circuit simulator. This tool supports the use of the compact model, allows a rapid simulation of the characteristics of single Tunnel-FET devices, and gives deeper insight to the device physics. 

The tool and the corresponding Verilog-A compact model THM-TFET was developed by Device Modeling Research Group of NanoP, THM University of Applied Sciences, Germany.

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The tool was developed by Device Modeling Research Group of NanoP, THM University of Applied Sciences, Germany.

Credits

Michael Graef, developer of the fundamental analytical modeling approach, which the compact model is based upon.

Sponsored by

Project funding: German Federal Ministry of Education and Research (BMBF), project no. FKZ 13FH010IX5

Publications

[1] F. Horst, A. Farokhnejad, Q. T. Zhao, B. Iniguez, A. Kloes, 2-D physics-based compact DC modeling of double-gate Tunnel-FETs, IEEE Trans. Electron Devices, Vol. 66, Issue: 1, 2018

[2] A. Farokhnejad, M. Schwarz, F. Horst, B. Iniguez, F. Lime, and A. Kloes, Analytical modeling of capacitances in Tunnel-FETs including the effect of Schottky barrier contacts, Solid-State Electronics, vol. 159, pp. 191-196, 2019

[3] A. Farokhnejad, F. Horst, B. Iniguez, F. Lime, and A. Kloes, Evaluation of static/transient performance of TFET inverter regarding device parameters using a compact model, Proc. ESSDERC, pp. 202-205, 2019

[4] M. Graef, F. Hosenfeld, F. Horst, A. Farokhnejad, F. Hain, B. Iniguez,  A. Kloes, Advanced analytical modeling of double-gate Tunnel-FETs - A performance evaluation, Solid-State Electronics, Volume 141, Pages 31-39, 201

Cite this work

Researchers should cite this work as follows:

  • Alexander Kloes, Fabian Horst, Anita Farokhnejad (2021), "Compact Solver for Double-Gate Tunnel-FETs," https://nanohub.org/resources/ctfet. (DOI: 10.21981/Z76A-SQ79).

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Tags

  1. TFET simulation
  2. tunnel FETs (TFET)