p-bits for Probabilistic Spin Logic (PSL)
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Abstract
Digital electronics is based on stable bits that can have one of two values, 0 and 1. At the other extreme we have quantum computing using using q-bits that can be in superposition states that are 0 and 1 at the same time. In our recent work we have introduced a concept that is intermediate between bits and q-bits, namely a probabilistic bit or a p-bit that fluctuates randomly between 0 and 1.
TALKS
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This talk provides a 50-minute introduction by Prof. Datta.
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A 10-minute version of the same talk can be viewed here.
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A one hour tutorial lecture by Dr. Kerem Camsari can be viewed here.
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SLIDES FROM A RECENT TALK
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REVIEW ARTICLE
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- K.Y. Camsari, B.M.Sutton and S.Datta “p-Bits for Probabilistic Spin Logic,” https://arxiv.org/abs/1809.04028
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TWO RECENT HIGHLIGHTS
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Emulating qubits using p-bits
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K.Y. Camsari, S. Chowdhury and S.Datta “Scaled Quantum Circuits Emulated with Room Temperature p-Bits,” https://arxiv.org/abs/1810.07144
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FPGA implementation of p-bits
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A.Z.Pervaiz, L.A.Ghantasala, B.M.Sutton and K.Y. Camsari “Weighted p-bits for FPGA implementation of probabilistic circuits,” IEEE Transactions on Neural Networks and Learning Systems, arxiv.org/abs/1712.04166.
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OTHER RELATED PUBLICATIONS
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RELATED nCORE CENTER
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Purdue University, West Lafayette, IN