SPICE Model of Graphene Nanoribbon FETs (GNRFET)
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Abstract
This is a SPICE compatible model for both MOS- and Schottky-Barrier-type Graphene Nano-Ribbons Field-Effect Transistor. These MOS-GNRFET and SB-GNRFET models are implemented in HSPICE and can be used for circuit simulations. The model is implemented based on the following publications:
[1] Ying-Yu Chen, Amit Sangai, Artem Rogachev, Morteza Gholipour, Giuseppe Iannaccone, Gianluca Fiori, and Deming Chen, “A SPICE-Compatible Model of MOS-Type Graphene Nano-Ribbon Field-Effect Transistors Enabling Gateand Circuit-Level Delay and Power Analysis Under Process Variation,” IEEE Transactions on Nanotechnology, vol. 14, no. 6, Nov. 2015.
[2] M. Gholipour, Y.-Y. Chen, A. Sangai, N. Masoumi, and D. Chen, “Analytical SPICE-Compatible Model of Schottky-Barrier-type GNRFETs with Performance Analysis,” IEEE Transactions on Very Large Scale Integration (VLSI) Systems, vol. 24, no. 2, pp. 650-663, Feb. 2016.
[3] Y-Y. Chen, A. Rogachev, A. Sangai, G. Iannaccone, G. Fiori, and D. Chen (2013). A SPICE-Compatible Model of Graphene Nano-Ribbon Field-Effect Transistors Enabling Circuit-Level Delay and Power Analysis Under Process Variation. IEEE/ACM Design, Automation & Test in Europe, pp. 1789-1794.
[4] M. Gholipour, Y-Y. Chen, A. Sangai, and D. Chen, “Highly Accurate SPICE-Compatible Modeling for Single- and Double-Gate GNRFETs with Studies on Technology Scaling,” Proceedings of IEEE/ACM Design, Automation & Test in Europe (DATE), Dresden, Germany, March 2014.
Sponsored by
This work is partially supported by NSF.
Publications
[1] Ying-Yu Chen, Amit Sangai, Artem Rogachev, Morteza Gholipour, Giuseppe Iannaccone, Gianluca Fiori, and Deming Chen, “A SPICE-Compatible Model of MOS-Type Graphene Nano-Ribbon Field-Effect Transistors Enabling Gateand Circuit-Level Delay and Power Analysis Under Process Variation,” IEEE Transactions on Nanotechnology, vol. 14, no. 6, Nov. 2015.
[2] M. Gholipour, Y.-Y. Chen, A. Sangai, N. Masoumi, and D. Chen, “Analytical SPICE-Compatible Model of Schottky-Barrier-type GNRFETs with Performance Analysis,” IEEE Transactions on Very Large Scale Integration (VLSI) Systems, vol. 24, no. 2, pp. 650-663, Feb. 2016.
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