Compact Solver for Double-Gate Tunnel-FETs

Plotting of DC and AC characteristics of DG-Tunnel-FETs using equations of the corresponding Verilog-A compact model THM-TFET.

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Version 1.1 - published on 19 Apr 2021

doi:10.21981/EWV2-4V56 cite this

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2481 Availability TCAD models
Asked by Alberto Tibaldi Open 0
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2464 Gate charge?
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2463 Fixed source-to-channel junction?
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2462 Tight tolerances?
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2461 ln vs log
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