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Carbon Nanotubes Interconnect Analyzer (CNIA)
Analyze performances of carbon nanotube bundle interconnects
Version 1.1.3 - published on 28 Mar 2018
doi:10.4231/D35T3G24Q cite this
This tool is closed source.
Citations Non-affiliated (17) | Affiliated (0)
Non-affiliated authors
- Afreen Khursheed, Kavita Khare, (2020), "Designing Dual-chirality And Multi-Vt Repeaters For Performance Optimization Of 32 Nm Interconnects", Circuit World, Emerald Publishing Limited, 46, 2: pg: 71-83, 0305-6120, (DOI: https://doi.org/10.1108/CW-06-2019-0060)
- Yash Agrawal, Mekala Kumar, Rajeevan Chandel, (2017), "A Unified Delay, Power And Crosstalk Model For Current Mode Signaling Multiwall Carbon Nanotube Interconnects", Circuits Syst Signal Process, : pg: 1-24, (DOI: 10.1007/s00034-017-0614-6)
- Sunil Jadav, Munish Vashistah, Rajeevan Chandel, (2014), "Carbon Nanotube Based Delay Model For High Speed Energy Efficient On Chip Data Transmission Using: Current Mode Technique", Electrical and Electronics Engineering: An International Journal \ELELIJ) , 3, 4: pg: 31-46, (DOI: 10.14810/elelij.2014.3404)
- Nisha Kuruvilla, JP Raina, (2014), "Impact Of Bundle Structure On Performance Of On-Chip CNT Interconnects", Journal Of Nanotechnology, Hindawi Publishing Corporation, 2014: pg: -, (DOI: 10.1155/2014/217519)
- Manodipan Sahoo, Prasun Ghosal, Hafizur Rahaman, (2013), "An ABCD Parameter-based Modeling And Analysis Of Crosstalk Induced Effects In Single-walled Carbon Nanotube Bundle Interconnects", 2013 5th Asia Symposium on Quality Electronic Design \ASQED), Quality Electronic Design \ASQED), 2013 5th Asia Symposium on, : pg: 264 -273, IEEE, 978-1-4799-1312-1 (DOI: 10.1109/ASQED.2013.6643598)
- Manodipan Sahoo, Hafizur Rahaman, (2013), "Performance Analysis Of Multiwalled Carbon Nanotube Bundles", Electronics and Nanotechnology \ELNANO), 2013 IEEE XXXIII International Scientific Conference , Electronics and Nanotechnology \ELNANO), 2013 IEEE XXXIII International Scientific Conference, : pg: 200-204, IEEE, 978-1-4673-4669-6 (DOI: 10.1109/ELNANO.2013.6552004)
- S.D. Pable, ZH Mohd Hasan, SA Abbasi, ARM Alamoud, (2013), "Interconnect Optimization To Enhance The Performance Of Subthreshold Circuits", Microelectronics Journal, Elsevier, 44, 5: pg: 454-461, (DOI: 10.1016/j.mejo.2013.01.014)
- T Alam, Rohit Dhiman, Rajeevan Chandel, (2011), "Resistive Analysis Of Mixed Carbon Nanotube Bundle Interconnect And Its Comparison With Copper Interconnect", International Conference and Workshop on Emerging Trends in Technology \ICWET 2011), Proceedings of the International Conference \& Workshop on Emerging Trends in Technology, : pg: 1157-1160, (DOI: https://doi.org/10.1145/1980022.1980271)
- T Alam, Rohit Dhiman, Rajeevan Chandel, D. Solanki, (2011), "Mixed Carbon Nanotube Bundle: Capacitance Analysis And Comparison With Copper Interconnect", Emerging Trends Emerging Trends in Electrical and Computer Technology \ICETECT), 2011 International Conference on , Emerging Trends in Electrical and Computer Technology \ICETECT), 2011 International Conference on, : pg: 697-701, IEEE, 978-1-4244-7923-8 (DOI: 10.1109/ICETECT.2011.5760207 )
- M. Hassan, M. Rahaman, M.H. Chowdhury, (2011), "Addressing Crosstalk Issue In On-chip Carbon Nanotube Interconnects Using Negative Capacitance", Circuits and Systems \ISCAS), 2011 IEEE International Symposium on , Circuits and Systems \ISCAS), 2011 IEEE International Symposium on, : pg: -, IEEE, 978-1-4244-9473-6 (DOI: 10.1109/ISCAS.2011.5937836 )
- S.D. Pable, Mohd. Hasan, M.A. Kafeel, (2011), "Performance Analysis Of Ultra Low-Power Mixed CNT Interconnects For Scaled Technology", 2011 International Symposium on Electronic System Design, 2011 International Symposium on Electronic System Design, : pg: 285-289, IEEE, 978-0-7695-4570-7, (DOI: 10.1109/ISED.2011.74)
- S.D. Pable, Mohd. Hasan, (2011), "High Speed Interconnect through Device Optimization for Subthreshold FPGA", Microelectronics Journal, Elsevier, 42, 3: pg: 545-552, 01, (DOI: 10.1016/j.mejo.2010.12.009)
- Mohd. Hasan, S.D. Pable, (2010), "Performance Analysis of Interconnect Drivers for Ultralow Power Applications", Proc. of Int. Conf. on Advances in Electrical & Electronics 2010, 1: pg: 68-73, 12, (DOI: 02.AEE.2010.01.71)
- Dipen Patel, Yong Kim, (2010), "Carbon nanotube bundle interconnect: Performance evaluation, optimum repeater size and insertion for global wire", Circuits And Systems \mwscas), 2010 53rd Ieee International Midwest Symposium On, Circuits and Systems \MWSCAS), 2010 53rd IEEE International Midwest Symposium on, : pg: 749-752, IEEE, 08, 978-1-4244-7771-5, (DOI: 10.1109/MWSCAS.2010.5548711)
- Abdul Kureshi, Mohd. Hasan, (2009), "Analysis of CNT Bundle and Its Comparison with Copper Interconnect for CMOS and CNFET Drivers", Journal Of Nanomaterials, Hindawi Publishing Corp., 2009: pg: -, 08, (DOI: 10.1155/2009/486979)
- Abdul Kureshi, Mohd. Hasan, (2009), "Analysis of CNT Bundle and its Comparison with Copper for FPGAs Interconnects", Journal of Applied Science, 5, 3: pg: 178-183, 03
- Rhonda Myers-Riggs, (2007), "Simulation and Design of InAs Nanowire Transistors Using Ballistic Transport", : pg: -, University of Cincinnati, 10