Small Scale Stenciling

By Marilyn Garza1; NNCI Nano2

1. University of California Santa Barbara, Santa Barbara, CA 2. National Nanotechnology Coordinated Infrastructure, Georgia Institute of Technology, Atlanta, GA

Published on

Abstract

This lab is analogous with some nanofabrication processes. This lab will help students understand some of the challenges encountered while making semiconductor chips and waveguides, both of which are found in electronic circuits.

Credits

Developed by the Georgia Institute of Technology NNIN RET Program.

Sponsored by

This lesson was developed with support of the National Science Foundation, NNIN and the NNIN RET Program.

Cite this work

Researchers should cite this work as follows:

  • Marilyn Garza, NNCI Nano (2017), "Small Scale Stenciling," https://nanohub.org/resources/25532.

    BibTex | EndNote

Submitter

Nancy Healy

NNCI Education and Outreach, Georgia Institute of Technology, Atlanta, GA

Tags