JFETlab: An Online Simulation Tool for Double Gate long channel Symmetrical Si and 4H-SiC JFETs

By Nikolaos Makris1; Matthias Bucher1; Farzan Jazaeri2

1. School of Electrical and Computer Engineering (ECE) of the Technical University of Crete (TUC) 2. EPFL

JFETlab is a simulation tool of static and dynamic electrical characteristics ( I-V, G-V, C-V ) of Si and 4H-SiC Junction Field Effect Transistors (JFETs) using temperature and channel concentration depedent material models.

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Version 1.2 - published on 07 Jun 2021

doi:10.21981/2JXY-BK35 cite this

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Usage

World usage

Location of all "JFETlab: An Online Simulation Tool for Double Gate long channel Symmetrical Si and 4H-SiC JFETs" Users Since Its Posting

Cumulative Simulation Users

508

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Simulation Runs

4,025

73 95 737 758 1048 1182 1213 1221 1228 1265 1266 1267 1326 1330 1334 1351 1357 1376 1392 1407 1442 1577 1601 1619 1640 1664 1765 1788 1903 1983 2073 2104 2116 2130 2130 2161 2166 2213 2239 2419 2437 2535 2612 2623 2625 2799 2831 2834 2837 2843 2868 3612 3620 3621 3627 3644 3667 3737 3815 3833 3835 3835 3899 3904 3912 3917 3996 4019 4025 4025
Overview
Average Total
Wall Clock Time 9.39 hours 2631.67 days
CPU time 0.99 seconds 1.85 hours
Interaction Time 11.56 minutes 54.03 days