The THM-TFET compact model is coded in Verilog-A and the result of several Ph D projects carried out at THM (Germany) in collaboration with URV (Spain). A physics-based DC compact model calculates the device terminal current-voltage (I-V) characteristics of a TFET (Tunnel-FET). A charge model determines its dynamic behavior. The combination of these two therefore provides an insight into the performance of the TFET and allows the user to simulate this device either as a single element or to perform DC, AC or transient simulations of complex circuits.

The compact model has been derived for double-gate (DG) point-tunneling TFETs. However, the flexibility and simplicity of the model allows to use it for the different structures such as single-gate (SG) planar devices, nanowire TFETs and devices with line-tunneling architecture. To do so, beside the structural parameters there have been defined also some fitting parameters which help to adapt the characteristics.

The compact model uses the same equations as the tool nanohub.org/tools/ctfet. Therefore, this tool allows a quick view on the capabilities of the THM-TFET compact model and simplifies fitting of the model to measurement data.

• THM-TFET Compact Model V1.2(VA | 83 KB)
• THM-TFET Compact Model 1.2 Benchmarks(ZIP | 2 MB)
• THM-TFET Compact Model 1.2 Parameters(ZIP | 311 KB)
• THM-TFET Compact Model 1.2 Experimental Data(ZIP | 18 KB)
• THM-TFET Compact Model 1.2 Manual(PDF | 2 MB)
• License terms

Researchers should cite this work as follows:

• Kloes, A.; Horst, F.; Farokhnejad, A.; Graef, M. (2022). THM-TFET Compact Model. (Version 1.2). nanoHUB. doi:10.21981/NGS2-AE57

  BibTex | EndNote

1. Circuit Simulation
2. Compact Model
3. physics-based
4. TFET simulation
5. tunnel FETs (TFET)
6. tunneling transistor