PN Junction Lab - Everything you need to explore and teach the basic concepts of P-N junction devices. Edit the doping concentrations, change the materials, tweak minority carrier lifetimes, and modify the ambient temperature. Then, see the effects in the energy band diagram, carrier densities, net charge distribution, I/V characteristic, etc.

• View a demo of this tool
• A Primer on Semiconductor Device Simulation (Seminar)

Tutorial on PN Junction Theory and modeling is found on the following link:

• PN-junction theory and modeling

Some interesting exercises regarding pn-junction theory and modeling are listed below:

• PN Diode Exercise: Series Resistance
• PN Diode Exercise: PIN Diode
• PN Diode Exercise: Graded Junction

PADRE (Pisces And Device REplacement) developed by Mark Pinto at AT&T Bell Labs.

If you reference this work in a publication, please cite as follows:

www.eas.asu.edu/~vasilesk

• Mannino, Matteo; Vasileska, Dragica; McLennan, Michael; Wang, Xufeng; Klimeck, Gerhard (2005), "PN Junction Lab," doi: 10254/nanohub-r229.6.

  BibTex | EndNote

In addition, we would appreciate it if you would add the following acknowledgment to your publication:

• Simulation services for results presented here were provided by the Network for Computational Nanotechnology (NCN) at nanoHUB.org

1. abacus
2. ACUTE
3. microelectronics
4. nanoelectronics
5. semiconductor
6. transport/Drift-Diffusion