Tags: tunneling transistor

Resources (1-2 of 2)

  1. A UCSD analytic TFET model

    Downloads | 18 Dec 2015 | Contributor(s):: Jianzhi Wu, Yuan Taur

    A continuous, analytic I-V model is developed for double-gate and nanowire tunnel FETs with 3D density of states, including depletion in the source. At the core of the model is a gate-controlled channel potential that satisfies the source and drain boundary conditions. Verified by...

  2. Course on Beyond CMOS Computing

    Teaching Materials | 06 Jun 2013 | Contributor(s):: Dmitri Nikonov

    Complementary metal-oxide-semiconductor (CMOS) field effect transistors (FET) underpinned the development of electronics and information technology for the last 30 years. In an amazing saga of development, the semiconductor industry (with a leading role of Intel) has shrunk the size of these...