Tags: nanotransistors

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A nanotransistor is a transistor whose dimensions are measured in nanometers. Transistors are used for switching and amplifying electronic signals. When combined in the millions and billions, they can be used to create sophisticated programmable information processors.

 

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  1. Chowdhury, Prodipto

    https://nanohub.org/members/152180

  2. A Short Overview of the NEEDS Initiative

    Online Presentations | 06 Jun 2016 | Contributor(s):: Mark Lundstrom

    The talk is a brief overview of the program that discusses the rationale, status, and plans for NEEDS.

  3. Smt. A. Naga Malli

    Assistant Professor, Dept of ECE, Gayatri Vidya Parishad college of Engineeering(A)

    https://nanohub.org/members/146115

  4. George James.T (Dr.)

    https://nanohub.org/members/138016

  5. MVS III-V HEMT model

    01 Dec 2015 | Compact Models | Contributor(s):

    By Shaloo Rakheja1, Dimitri Antoniadis1

    Massachusetts Institute of Technology (MIT)

    The MIT Virtual Source (MVS) model is a semi-empirical compact model for nanoscale transistors that accurately describes the physics of quasi-ballistic transistors with only a few physical...

    https://nanohub.org/publications/71/?v=1

  6. Phonon Interactions in Single-Dopant-Based Transistors: Temperature and Size Dependence

    Online Presentations | 25 Nov 2015 | Contributor(s):: Marc Bescond, Nicolas Cavassilas, Salim Berrada

    IWCE 2015 presentation. in this work we investigate the dependence of electron-phonon scattering in single dopant-based nanowire transistor with respect to temperature and dimensions. we use a 3d real-space non-equilibrium green': ; s function (negf) approach where electron-phonon...

  7. Inter-band Tunnel Transistors: Opportunities and Challenges

    Online Presentations | 30 Oct 2015 | Contributor(s):: Suman Datta

    In this talk, we will review progress in Tunnel FETs and also analyze primary roadblocks in the path towards achieving steep switching performance in III-V HTFET.

  8. Negative Capacitance Ferroelectric Transistors: A Promising Steep Slope Device Candidate?

    Online Presentations | 30 Oct 2015 | Contributor(s):: Suman Datta

    In this talk, we will review progress in non-perovskite ALD based ferroelectric dielectrics which have strong implication for VLSI compatible negative capacitance Ferroelectric FETs.

  9. Sunjeet Jena

    https://nanohub.org/members/130889

  10. The Deployment and Evolution of the First NEEDS- Certified Model — MIT Virtual Source Compact Model for Silicon Nanotransistors

    Online Presentations | 04 Oct 2015 | Contributor(s):: Shaloo Rakheja

    In my talk, I will walk you through the fundamental steps involved in developing compact models, using the MVS model as an example. From the “lessons learned” in the process of MVS release in 2013 and its subsequent updates, I will provide a checklist of good practices to adopt while...

  11. ABHISHEK SARKAR

    https://nanohub.org/members/126687

  12. Variation-Aware Nanosystem Design Kit (NDK)

    Downloads | 30 Jul 2015 | Contributor(s):: Gage Hills

    Carbon nanotube field-effect transistors (CNFETs) are promising candidates for building energy-efficient digital systems at highly scaled technology nodes. However, carbon nanotubes (CNTs) are inherently subject to variations that reduce circuit yield, increase susceptibility to noise, and...

  13. The Ultimate Scaling Limit - A Deterministic Single Atom Transistor

    Online Presentations | 10 Mar 2015 | Contributor(s):: Gerhard Klimeck

    A talk by Dr. Gerhard Klimeck, Director of nanoHUB.org, Purdue University, Founder of NEMOco, LLC @ the University of Michigan.

  14. High-Frequency Carbon Nanotube Transistors: A Multi-Scale Simulation Framework

    Online Presentations | 07 Jan 2015 | Contributor(s):: Martin Claus

    The talk gives an overview on a multi-scale simulation framework with which this question can be answered. Methods to study the steady-state and transient quantum and semi-classical transport phenomena in CNTFETs and their application for the optimization of CNTFETs will be discussed. Special...

  15. The MVS Nanotransistor Model: A Primer

    Online Presentations | 26 Nov 2014 | Contributor(s):: Mark Lundstrom

    In this talk, I will present a gentle introduction to the MVS model. I’ll show how the basic equations of the model can be obtained by using a traditional approach to MOSFETs. I’ll then indicate how the parameters in this traditional model must be re-interpreted in order to capture...

  16. The MVS Nanotransistor Model: A Case Study in Compact Modeling

    Online Presentations | 26 Nov 2014 | Contributor(s):: Shaloo Rakheja

    In this talk, I will present my view on building an industry-standard compact model by using the MVS model as a case study. In the first part of the talk, I discuss mathematical issues, such as the smoothness of functions and their higher-order derivatives in connection with the MVS model....

  17. Abdoul M Rjoub

    Prof. Abdoul Rjoub is a faculty member at Jordan University of Science and Technology in the Computer Engineering Department. His main research interests include but are not limited to the...

    https://nanohub.org/members/107150

  18. Basics of Compact Model Development

    Online Presentations | 02 Aug 2014 | Contributor(s):: Sivakumar P Mudanai

    This tutorial is aimed at developing an understanding of what a compact model is, the need and role of compact models in the semiconductor industry and the requirements that a compact model must meet for acceptable use in circuit simulations. The tutorial will use simple examples from planar...

  19. Hybrid CMOS/SET models for PSpice?

    Q&A|Closed | Responses: 2

    Hello! Can anyone tell me where can I find models for hybrid transistors (CMOS and Sinlgle Electron) for designing circuits in PSpice? I must find them for my homework. Thank you!

    https://nanohub.org/answers/question/1404

  20. Sheikh Aamir Ahsan

    https://nanohub.org/members/102143