Sending report ...Nanotechnology 501 Lecture Series
Simulating with PETE: Purdue Exploratory Technology Evaluator
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Supporting Documents
- Presentation (with audio) (SWF)
- Presentation Slides (PDF, 881.76 Kb)
- Podcast (video) What's this? (MP4, 33.23 Mb)
- Podcast (audio) What's this? (MP3, 17.35 Mb)
| Contributor(s) | Arijit Raychowdhury Purdue University, West Lafayette |
|---|---|
| Abstract | Using PETE one can evaluate any MOSFET like devices or any New Devices in terms of performance on Benchmark circuits. The input to the tool can be in terms of typical MOSFET parameters or in terms of I-V and C-V tables. The Benchmark circuits include minimum sized inverter, nand chain, norchain, 8-bit Full Adder, Ring Oscillator and Cascaded inverters driving a big load capacitance. Further, one can perform DC simulations on inverters and obtain voltage transfer characteristics (VTCs) and noise margin/ gain from the VTC. In this tutorial we will discuss how to use PETE for evaluating exploratory nano devices. We will further discuss the algorithms used, the interface and some caveats while using the tool. |
| Biography | Arijit Raychowdhury received his B.E. degree in 2001 in Electronics and Telecommunication engineering from Jadavpur University, Calcutta, India. Since 2002, he has been pursuing Ph.D. in Electrical and Computer engineering at Purdue University, IN. He has worked as an Analog Circuit Designer with Texas Instruments Inc., India (2002 to 2003) and with the Circuit Research Labs, Intel Corporation (summer of 2005 and 2006) pursuing design ideas with novel nano- devices. His research interests include device/circuit design for scaled silicon and non-silicon technologies. Mr. Raychowdhury has received academic excellence awards in 1997, 2000, and 2001, the Meissner Fellowship from Purdue University in 2002, the NASA INAC Fellowship in 2003 and the Intel PhD Fellowship Award in 2005. He has received Best Paper Awards at IEEE NANO 2003 and ISLPED, 2006. He holds six patents and has published over thirty articles in journals and refereed conferences. |
| Sponsored by | NCN@Purdue Student Leadership Team |
| Cite this work | If you reference this work in a publication, please cite as follows: |
| Date posted | 25 Sep, 2007 |
| Time | 02:30 PM, September 17, 2007 |
| Location | EE 317, Purdue University, West Lafayette, IN |
| Type | Online Presentations |
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9.5 Ranking Series
Part of: Nanotechnology 501 Lecture Series
Nanotechnology 501 Lecture Series
Type Series Contributor(s) Gerhard Klimeck (editor), Mark Lundstrom (editor), Joseph M. Cychosz (editor) Date 22 Feb, 2005 Avg. Rating (4) Rate this Nanotechnology 501 is a series of lectures designed to provide an introduction to nanotechnology. This series is similar to our popular Nanotechnology 101 series, but directed at the graduate student/professional level.
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