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The oxidation process is one of the most important processes in VLSI fabrication. It is implemented in processes such as the gate dielectric growth, the quality of which is extremely important for the scaling and performance of today's integrated circuit technology. This simulation tool integrates both the classic Deal-Grove's model and Massoud's model, which both describe the oxidation growth process. The tool gives users the freedom to adjust critical parameters and conditions in the process, such as oxidant condition, time, initial oxide thickness, temperature, pressure, crystal orientation, as well as an opportunity to choose between the Deal-Grove's or Massoud's model, or a combination of both.

An oxide thickness versus time figure is plotted almost instantaneously after the users specify the necessary parameters and conditions. The oxidation process is simulated after one click on the web interface, while all the complicated details and equation-solving procedures are hidden behind the scene. The interactive interface of the module and its simplicity of usage demonstrates the module's educational value in that it helps students and engineers build intuition into the oxidation process with minimum learning curve. Insightful comparison, such as one between thin and thick oxide growth, can be done easily. Moreover, the module can be used as a handy and efficient "oxidation calculator".

Developed by Shuqing Cao, Yang Liu and Peter Griffin, Stanford University, 2006

Silicon VLSI Technology advisors: James Plummer, Michael Deal, and Peter Griffin, Stanford University

Technology CAD advisor: Robert Dutton, Stanford University

• J. D. Plummer, M. D. Deal, and P. B. Griffin, Silicon VLSI Technology, Fundamentals, Practice and Modeling, Prentice Hall, 2000.

If you reference this work in a publication, please cite as follows:

• Cao, Shuqing (Victor); Liu, Yang; Griffin, Peter (2006), "Process Lab:Oxidation," doi: 10254/nanohub-r1879.1.

  BibTex | EndNote

In addition, we would appreciate it if you would add the following acknowledgment to your publication:

• Simulation services for results presented here were provided by the Network for Computational Nanotechnology (NCN) at nanoHUB.org

1. microelectronics
2. nanoelectronics
3. processing