2006 Summer Undergraduate Research Intern Program Conference
Investigation of the Electrical Characteristics of Triple-Gate FinFETs and Silicon-Nanowire FETs
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Supporting Documents
- Presentation (with audio) (SWF)
- Presentation Slides (PDF, 1.12 Mb)
| Contributor(s) | Monica Taba University of Texas, El Paso Gerhard Klimeck Purdue University, West Lafayette |
|---|---|
| Abstract | Electrical characteristics of various Fin field-effect transistors (FinFETs) and silicon-nanowires were analyzed and compared using a modified three-dimensional self-consistent quantum-mechanical simulator in order to investigate device performance. FinFETs have been proposed to fulfill the requirement of the semiconductor road map as old devices are reaching their scaling limits. It can be expected to be manufactured in a conventional CMOS process, whereas an ideal silicon-nanowire, although it has better performance, is difficult to manufacture. Simulations with different fin dimensions were done and compared to the ideal nanowire FinFET to analyze their electrical characteristics. As a result, the FinFET device can be the optimal structure with characteristics comparable to the silicon nanowire. INAC/NCN |
| Cite this work | If you reference this work in a publication, please cite as follows: |
| Date posted | 16 Aug, 2006 |
| Time | 09:25 AM, August 04, 2006 |
| Location | EE Building, Room 118 |
| Type | Online Presentations |
| Tags |
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Part of: 2006 Summer Undergraduate Research Intern Program Conference
2006 Summer Undergraduate Research Intern Program Conference
The NASA Institute for Nanoelectronics and Computing and NSF Network for Computating Nanotechnology offers qualifying students the opportunity to become Summer Undergraduate Research Interns (SURIs). SURIs join an ongoing cross-disciplinary research project team comprised of faculty and graduate …
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