DevRel contains a demonstration of Negative Bias Temperature Instability (NBTI), which is a major reliability issue for nanoscale MOS devices. When a device is stressed at negative voltage, depassivation of SiH bonds in the interface occurs. As a result, interface traps are generated (reaction) and the resulting hydrogen species diffuses away from the interface (diffusion). Hence, device characteristics (threshold voltage, mobility, drain current, etc) degrades with time and such degradation satisfies a power law (~ time^n) formula.

Implementing such Reaction-diffusion (RD) model, DevRel shows how threshold voltage of a PMOS device can change with time at different voltages and temperatures.

• Negative Bias Temperature Instability Basics/Modeling

Thanks to the following people for their contributions to this work:

This work was supported by NCN, NSF, and SRC.

If you reference this work in a publication, please cite as follows:

• "A Comprehensive Model for PMOS NBTI Degradation," M. A. Alam and S. Mahapatra, Special Issue of Journal of Microelectronics Reliability (Invited), 45(1), pp. 71-81,(2005).

• Islam, Ahmad Ehteshamul; Kufluoglu, Haldun; Alam, Muhammad A. (2006), "DevRel," doi: 10254/nanohub-r1647.2.

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In addition, we would appreciate it if you would add the following acknowledgment to your publication:

• Simulation services for results presented here were provided by the Network for Computational Nanotechnology (NCN) at nanoHUB.org

1. microelectronics
2. MOSFET
3. nanoelectronics
4. reliability