Sending report ...NCN Nanoelectronics: Simulation Tools for Research
NanoMOS
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Usage Stats Overall Period: Updated 03 Jul, 2008 Users: 1068 Jobs: 9768 Avg. exec. time: 15 mins Reviews & Citations Google/IEEE: updated 03 Jun, 2008 Avg. Review: Citations: 51
1068 users, detailed statistics
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This tool is open source, according to this license.
Available Versions
- 3.0.3 (published)
- 3.0.2 (unpublished)
- 3.0.1 (unpublished)
- 3.0 (unpublished)
- 2.5 (unpublished)
| Version | 3.0.3 - published on 19 Jun, 2008 |
|---|---|
| Contributor(s) | Sebastien Goasguen Purdue University, West Lafayette Akira Matsudaira University of Illinois at Urbana Champaign Shaikh S. Ahmed Purdue University, West Lafayette Kurtis Cantley University of Texas at Dallas Mark Lundstrom Purdue University, West Lafayette |
| At a glance | 2-D simulator for thin body (less than 5 nm), fully depleted, double-gated n-MOSFETs |
| Screenshots | |
| Description | NanoMOS is a 2-D simulator for thin body (less than 5 nm), fully depleted, double-gated n-MOSFETs. A choice of five transport models is available (drift-diffusion, classical ballistic, energy transport, quantum ballistic, and quantum diffusive). The transport models treat quantum effects in the confinement direction exactly and the names indicate the technique used to account for carrier transport along the channel. Each of these transport models is solved self-consistently with Poisson's equation. Several internal quantities such as subband profiles, subband areal electron densities, potential profiles and I-V information can be obtained from the source code. NanoMOS includes an improved treatment of carrier scattering. (Errors in self energy and the LDOS plot were also corrected.)
|
| Credits | nanoMOS 1.0 was written in Matlab and developed by Zhibin Ren as part of his doctoral work at Purdue University. The development of NanoMOS was supported by the Semiconductor Research Corporation and by the Army Research Office through a Defense University Research Initiative on Nanotechnology grant. |
| Cite this work | If you reference this work in a publication, please cite as follows:
In addition, we would appreciate it if you would add the following acknowledgment to your publication:
|
| Type | Tools |
| Tags |
Citations
The following are publications that have cited this resource, separated by their affiliation to the NCN.
Non-affiliated authors
-
Ray, B.; Shubhakar; Mahapatra, S. (2007), "Necessity for Quantum MEchanical Simulation for the Future Technology Nodes," Physics of Semiconductor Devices, 2007. IWPSD 2007. International Workshop on: pg. 880-883, 12. 978-1-4244-1728-5. (DOI: 10.1109/IWPSD.2007.4472662).
-
Khan, A.I.; Ashraf, Md.K.; Haque, A. (2007), "Influence of Wave Function Penetration on Short Channel Effects in Nanoscae Double Gate MOSFETs," Electron Devices and Solid-State Circuits, 2007. EDSSC 2007, IEE Eonference on: pg. 109-112, 12. 978-1-4244-0637-1.
-
Rafhay, Q.; Clerc, R.; Ghibaudo, G.; Pananakakis, G. (2007), "Impact of source to drain tunneling on the lon/loff trade-off of alternative channel material MOSFETs," Semiconductor Device Research Symposium, 2007 International: pg. 1-2, 12. 978-4244-1892-3.
-
Mehrotra, S.R.; Roenker, K.P. (2007), "A Simulation Study of Silicon Nanowire Field Effect Transistors (FETs)" (Master's Thesis), University of Cincinnati, 02.
-
Balasubramanian, S.; Liu, T.-J.K. (2006), "Nanoscale thin-body MOSFET design and applications" (PhD Thesis), University of California at Berkeley, 10.
-
Ahmadain, A.A.; Roenker, K.P.; Tomko, K.A. (2006), "A Study of the Performance of Ballistic Nanoscale MOSFETS Using Classical and Quantum Ballistic Transport Models," Nanotechnology, 2006. IEEE-NANO 2006. Sixth IEEE Conference on, 1: pg. 16-19, 06. 1-4244-0077-5.
-
Klös, A. (2006), "Nanotechnologie in der Elektronik: Ein Ausblick auf die Bauelemente der Zukunft," Technologie 2006, Wetzlar.
-
Trellakis, A.; Zibold, T.; Andlauer, T.; Birner, S.; Smith, R.K.; Morschl, R.; Vogl, P. (2006), "The 3D nanometer device projet nextnano: Concepts, methods, results," Journal of Computational Electronics, 5, 4: pg. 285-289, 12. 1569-8025 (print) 1572-8137 (onl1572-8137 (online). (DOI: 10.1007/s10825-006-0005-x).
-
Xia, T.; Banerjee, S.K. (2005), "Simulation Study of Deep Sub-Micron and Nanoscale Semiconductor Transistors" (PhD Thesis), University of Texas at Austin, 05.
-
Zhao, M.; Chadha, V.; Figueiredo, R.J. (2005), "Supporting application-tailored grid file system sessions with WSRF-based services," High Performance Distributed Computing, 2005. HPDC-14. Proceedings. 14th IEEE International Symposium on: pg. 24--33, 07.
-
Ahmed, S.S.; Ringhofer, C.; Vasileska, D. (2005), "Efficacy of the Thermalized Effective Potential Approach for Modeling Nano-Devices," Simulation of Semiconductor Processes and Devices, 2005. SISPAD 2005. International Conference on: pg. 251--254, 09.
-
Xiong, S.; Bokor, J. (2005), "Structural optimization of SUTBDG devices for low-power applications," Electron Devices, IEEE Transactions on, 52, 312: pg. 360--366, 03.
-
Iwata, H.; Matsuda, T.; Ohzone, T. (2005), "Influence of image and exchange-correlation effects on electron transport in nanoscale DG MOSFETs," Electron Devices, IEEE Transactions on, 52, 7: pg. 1596--1602, 07.
-
Akturk, A.; Goldsman, N.; Metze, G. (2005), "Self-consistent modeling of heating and MOSFET performance in 3-D integrated circuits," Electron Devices, IEEE Transactions on, 52, 11: pg. 2395--2403, 11.
-
Hamid, H.A.; Iniguez, B.; Jimenez, D.; Marsal, L.F.; Pallares, J. (2005), "Double gate MOSFET compact model including scattering," Electron Devices, 2005 Spanish Conference on, 413, 02.
-
Myers-Riggs, R.R.; Roenker, K.P. (2005), "Simulation and Design of InAs Nanowire Transistors Using Ballistic Transport" (Master's Thesis), University of Cincinnati.
-
Abdolkader, T.M.; Fathi, M.; Fikry, W.; Omar, O.A. (2005), "FETMOSS: a software tool for 2D simulation of double-gate MOSFET," Enabling Technologies for the New Knowledge Society: ITI 3rd International Conference on Information and Communications Technology, 2005: pg. 193-208, 12. 0-7803-9270-1. (DOI: 10.1109/ITICT.2005.1609624).
-
Fonseca, J.; Kaya, S. (2004), "Simulation of interface roughness in DG-MOSFETs using non-equilibrium Green's functions," Device Research Conference, 2004. 62nd DRC. Conference Digest, 1: pg. 65--66, 06.
-
Laux, S.E. (2004), "Arbitrary crystallographic orientation in QDAME with Ge 7.5 nm DGFET examples," Journal of Computational Electronics, 3, 3-4: pg. 379-385, 10. (DOI: 10.1007/s10825-004-7081-6).
-
Graham, P.; Gokhale, M. (2004), "Nanocomputing in the presence of defects and faults: a survey," Nano, quantum and molecular computing: implications to high level design and validation, Kluwer Academic Publishers, Norwell, MA.
-
Fonseca, J.; Kaya, S. (2004), "Accurate treatment of interface roughness in nanoscale DG MOSFETs using non-equilibrium Green's functions," Solid-State Electronics, 48, 10-11: pg. 1843-1847, 11. (DOI: 10.1016/j.sse.2004.05.024).
-
Xia, T.; Register, L.F.; Banerjee, S.K. (2004), "Quantum Transport in Carbon Nanotube Transistors: Complex Band Structure Effects," Journal of Applied Physics, 95, 3, 02. (DOI: 10.1063/1.1631747).
-
Jimenez, D.; Saenz, J.J.; Iniguez, B.; Sune, J.; Marsal, L.F.; Pallares, J. (2003), "Compact modeling of nanoscale MOSFETs in the ballistic limit," European Solid-State Device Research, 2003. ESSDERC '03. 33rd Conference on: pg. 187--190, 09.
-
Balasubramanian, S.; Chang, L.; Nikolic, B.; King, Tsu-Jae (2003), "Circuit-Performance Implications for Double-Gate MOSFET Scaling Below 25nm," 2003 Silicon Nanoelectronics Workshop, 06.
-
Xia, T.; Register, L.F.; Banerjee, S.K. (2003), "Quantum transport in double-gate MOSFETs with complex band structure," Electron Devices, IEEE Transactions on, 50, 6: pg. 1511-1516, 06. 1557-9646. (DOI: 10.1109/TED.2003.813348).
-
Fonseca, J.; Kaya, S. (2003), "Simulation of interface roughness in DG-MOSFETs using non-equilibrium Green's functions," Semiconductor Device Research Symposium, 2003 International: pg. 512--513, 12.
-
Turk, Z.; Cerovsek, T.; Stankovski, V. (2003), "D24: Guide for tools and services delivery," ICCI, 12.
-
Beckett, P. (2003), "Exploiting Multiple Functionality for Nano-Scale Reconfigurable Systems," Great Lakes Symposium on VLSI: pg. 50-55. 1-58113-677-3.
Affiliated authors
-
Cantley, K.D.; Liu, Y.; Pal, H.S.; Low, T.; Ahmed, S.S.; Lundstrom, M.S. (2007), "Performance Analysis of III-V Materials in a Double-Gate nano-MOSFET," Electron Devices Meeting, 2007, IEDM 2007, IEEE International: pg. 113-116, 12. 978-1-4244-1508-3.
-
Ahmed, S.S.; Klimeck, G.; Kearney, D.; McLennan, M.; Anantram, M.P. (2007), "Quantum Simulations of Dual Gate MOSFET Devices: Building and Deploying Community Nanotechnology Software Tools on nanoHUB.org," International Journal of High Speed Electronics and Systems, 17, 3: pg. 485-494, 09.
-
Lundstrom, M.S.; Klimeck, G. (2006), "The NCN: Science, Simulation, and Cyber Services," Emerging Technologies - Nanoelectronics, 2006 IEEE Conference on: pg. 496--500, 01.
-
Ananthan, H.; Roy, K. (2006), "A Compact Physical Model for Yield Under Gate Length and Body Thickness Variations in Nanoscale Double-Gate CMOS," Electron Devices, IEEE Transactions on, 53, 9: pg. 2151-2159, 09.
-
Zhao, M.; Figueiredo, R.J. (2006), "Application-Tailored Cache Consistency for Wide-Area File Systems," Distributed Computing Systems, 2006. ICDCS 2006. 26th IEEE International Conference on: pg. 41, 07.
-
Rahman, A.; Klimeck, G.; Lundstrom, M.S. (2005), "Novel channel materials for ballistic nanoscale MOSFETs-bandstructure effects," Electron Devices Meeting, 2005. IEDM Technical Digest. IEEE International: pg. 4, 12.
-
Fortes, J.A.B.; Figueiredo, R.J.; Lundstrom, M.S. (2005), "Virtual computing infrastructures for nanoelectronics simulation," Proceedings of the IEEE, 93, 10: pg. 1839--1847, 10.
-
Ravishankar, R.; Kathawala, G.; Ravaioli, U.; Hasan, S.; Lundstrom, M.S. (2005), "Comparison of Monte Carlo and NEGF simulations of double gate MOSFETs," Journal of Computational Electronics, 4, 1-2: pg. 39-43, 04. (DOI: 10.1007/s10825-005-7104-y).
-
Rahman, A.; Lundstrom, M.S.; Ghosh, A.W. (2005), "Generalized effective-mass approach for n-type metal-oxide-semiconductor field-effect transistors on arbitrarily oriented wafers," Journal of Applied Physics, 97, 053702.
-
Wang, J.; Lundstrom, M.S. (2005), "Device Physics and Simulation of Silicon Nanowire Transistors" (PhD Thesis), Purdue University, 08.
-
Rahman, A.; Lundstrom, M.S. (2005), "Exploring New Channel Materials for Nanoscale CMOS Devices: A Simulation Approach" (PhD Thesis), Purdue University.
-
Wang, J.; Polizzi, E.; Lundstrom, M.S. (2003), "A computational study of ballistic silicon nanowire transistors," Electron Devices Meeting, 2003. IEDM '03 Technical Digest. IEEE International: pg. 29.5.1-29.5.4, 12. 0-7803-7872-5. (DOI: 10.1109/IEDM.2003.1269375).
-
Rahman, A.; Ghosh, A.W.; Lundstrom, M.S. (2003), "Assessment of Ge n-MOSFETs by quantum simulation," Electron Devices Meeting, 2003. IEDM '03 Technical Digest. IEEE International: pg. 1941--1944, 12.
-
Goasguen, S.; Venugopal, R.; Lundstrom, M.S. (2003), "Modeling transport in nanoscale silicon and molecular devices on parallel machines," Nanotechnology, 2003. IEEE-NANO 2003. 2003 Third IEEE Conference on, 1: pg. 398--401, 08.
-
Rahman, A.; Guo, J.; Datta, S.; Lundstrom, M.S. (2003), "Theory of ballistic nanotransistors," Electron Devices, IEEE Transactions on, 50, 9: pg. 1853--1864, 09.
-
Ren, Z.; Venugopal, R.; Goasguen, S.; Datta, S.; Lundstrom, M.S. (2003), "nanoMOS 2.5: A two-dimensional simulator for quantum transport in double-gate MOSFETs," IEEE Transactions on Electron Devices, 50, 9: pg. 1914--1925, 09.
-
Lundstrom, M.S. (2003), "Device physics at the scaling limit: what matters? [MOSFETs]," Electron Devices Meeting, 2003. IEDM '03 Technical Digest. IEEE International: pg. 3311--3314, 12.
-
Low, T.; Hou, Y.T.; Li, M.F.; Zhu, Chunxiang; Chin, A.; Samudra, G.; Chan, L.; Kwong, D.-L. (2003), "Investigation of Performance Limits of Germanium Double-Gated MOSFETs," IEEE International Electron Devices Meeting, 2003. IEDM '03 Technical Digest, 12. 0-7803-7872-5. (DOI: 10.1109/IEDM.2003.1269374).
-
Lundstrom, M.S.; Ren, Z. (2002), "Essential physics of carrier transport in nanoscale MOSFETs," Electron Devices, IEEE Transactions on, 49, 10: pg. 133--141, 01.
-
Parikh, C.D.; Lundstrom, M.S. (2002), "Electron transport in nanoscale bipolar transistors," 2002 2nd IEEE Conference on Nanotechnology.
-
Goasguen, S.; Butt, A.R.; Colby, K.D.; Lundstrom, M.S. (2002), "Parallelization of the nanoscale device simulator nanoMOS-2.0 using a 100 nodes linux cluster," Nanotechnology, 2002. IEEE-NANO 2002. Proceedings of the 2002 2nd IEEE Conference on: pg. 409--412, 08.
-
Ren, Z.; Venugopal, R.; Datta, S.; Lundstrom, M.S. (2001), "Examination of design and manufacturing issues in a 10 nm double gate MOSFET using nonequilibrium Green's function simulation," Electron Devices Meeting, 2001. IEDM Technical Digest. International: pg. 541--544, 12.
-
Rumsey, D.; Lundstrom, M.S. (2001), "Electrical Characterization of Bulk MOSFETs in Terms of Backscattering Coefficients" (Master's Thesis), Purdue University, 12.
Ray, B.; Shubhakar; Mahapatra, S. (2007), "Necessity for Quantum MEchanical Simulation for the Future Technology Nodes," Physics of Semiconductor Devices, 2007. IWPSD 2007. International Workshop on: pg. 880-883, 12. 978-1-4244-1728-5. (DOI: 10.1109/IWPSD.2007.4472662).
Khan, A.I.; Ashraf, Md.K.; Haque, A. (2007), "Influence of Wave Function Penetration on Short Channel Effects in Nanoscae Double Gate MOSFETs," Electron Devices and Solid-State Circuits, 2007. EDSSC 2007, IEE Eonference on: pg. 109-112, 12. 978-1-4244-0637-1.
Rafhay, Q.; Clerc, R.; Ghibaudo, G.; Pananakakis, G. (2007), "Impact of source to drain tunneling on the lon/loff trade-off of alternative channel material MOSFETs," Semiconductor Device Research Symposium, 2007 International: pg. 1-2, 12. 978-4244-1892-3.
Mehrotra, S.R.; Roenker, K.P. (2007), "A Simulation Study of Silicon Nanowire Field Effect Transistors (FETs)" (Master's Thesis), University of Cincinnati, 02.
Balasubramanian, S.; Liu, T.-J.K. (2006), "Nanoscale thin-body MOSFET design and applications" (PhD Thesis), University of California at Berkeley, 10.
Ahmadain, A.A.; Roenker, K.P.; Tomko, K.A. (2006), "A Study of the Performance of Ballistic Nanoscale MOSFETS Using Classical and Quantum Ballistic Transport Models," Nanotechnology, 2006. IEEE-NANO 2006. Sixth IEEE Conference on, 1: pg. 16-19, 06. 1-4244-0077-5.
Klös, A. (2006), "Nanotechnologie in der Elektronik: Ein Ausblick auf die Bauelemente der Zukunft," Technologie 2006, Wetzlar.
Trellakis, A.; Zibold, T.; Andlauer, T.; Birner, S.; Smith, R.K.; Morschl, R.; Vogl, P. (2006), "The 3D nanometer device projet nextnano: Concepts, methods, results," Journal of Computational Electronics, 5, 4: pg. 285-289, 12. 1569-8025 (print) 1572-8137 (onl1572-8137 (online). (DOI: 10.1007/s10825-006-0005-x).
Xia, T.; Banerjee, S.K. (2005), "Simulation Study of Deep Sub-Micron and Nanoscale Semiconductor Transistors" (PhD Thesis), University of Texas at Austin, 05.
Zhao, M.; Chadha, V.; Figueiredo, R.J. (2005), "Supporting application-tailored grid file system sessions with WSRF-based services," High Performance Distributed Computing, 2005. HPDC-14. Proceedings. 14th IEEE International Symposium on: pg. 24--33, 07.
Ahmed, S.S.; Ringhofer, C.; Vasileska, D. (2005), "Efficacy of the Thermalized Effective Potential Approach for Modeling Nano-Devices," Simulation of Semiconductor Processes and Devices, 2005. SISPAD 2005. International Conference on: pg. 251--254, 09.
Xiong, S.; Bokor, J. (2005), "Structural optimization of SUTBDG devices for low-power applications," Electron Devices, IEEE Transactions on, 52, 312: pg. 360--366, 03.
Iwata, H.; Matsuda, T.; Ohzone, T. (2005), "Influence of image and exchange-correlation effects on electron transport in nanoscale DG MOSFETs," Electron Devices, IEEE Transactions on, 52, 7: pg. 1596--1602, 07.
Akturk, A.; Goldsman, N.; Metze, G. (2005), "Self-consistent modeling of heating and MOSFET performance in 3-D integrated circuits," Electron Devices, IEEE Transactions on, 52, 11: pg. 2395--2403, 11.
Hamid, H.A.; Iniguez, B.; Jimenez, D.; Marsal, L.F.; Pallares, J. (2005), "Double gate MOSFET compact model including scattering," Electron Devices, 2005 Spanish Conference on, 413, 02.
Myers-Riggs, R.R.; Roenker, K.P. (2005), "Simulation and Design of InAs Nanowire Transistors Using Ballistic Transport" (Master's Thesis), University of Cincinnati.
Abdolkader, T.M.; Fathi, M.; Fikry, W.; Omar, O.A. (2005), "FETMOSS: a software tool for 2D simulation of double-gate MOSFET," Enabling Technologies for the New Knowledge Society: ITI 3rd International Conference on Information and Communications Technology, 2005: pg. 193-208, 12. 0-7803-9270-1. (DOI: 10.1109/ITICT.2005.1609624).
Fonseca, J.; Kaya, S. (2004), "Simulation of interface roughness in DG-MOSFETs using non-equilibrium Green's functions," Device Research Conference, 2004. 62nd DRC. Conference Digest, 1: pg. 65--66, 06.
Laux, S.E. (2004), "Arbitrary crystallographic orientation in QDAME with Ge 7.5 nm DGFET examples," Journal of Computational Electronics, 3, 3-4: pg. 379-385, 10. (DOI: 10.1007/s10825-004-7081-6).
Graham, P.; Gokhale, M. (2004), "Nanocomputing in the presence of defects and faults: a survey," Nano, quantum and molecular computing: implications to high level design and validation, Kluwer Academic Publishers, Norwell, MA.
Fonseca, J.; Kaya, S. (2004), "Accurate treatment of interface roughness in nanoscale DG MOSFETs using non-equilibrium Green's functions," Solid-State Electronics, 48, 10-11: pg. 1843-1847, 11. (DOI: 10.1016/j.sse.2004.05.024).
Xia, T.; Register, L.F.; Banerjee, S.K. (2004), "Quantum Transport in Carbon Nanotube Transistors: Complex Band Structure Effects," Journal of Applied Physics, 95, 3, 02. (DOI: 10.1063/1.1631747).
Jimenez, D.; Saenz, J.J.; Iniguez, B.; Sune, J.; Marsal, L.F.; Pallares, J. (2003), "Compact modeling of nanoscale MOSFETs in the ballistic limit," European Solid-State Device Research, 2003. ESSDERC '03. 33rd Conference on: pg. 187--190, 09.
Balasubramanian, S.; Chang, L.; Nikolic, B.; King, Tsu-Jae (2003), "Circuit-Performance Implications for Double-Gate MOSFET Scaling Below 25nm," 2003 Silicon Nanoelectronics Workshop, 06.
Xia, T.; Register, L.F.; Banerjee, S.K. (2003), "Quantum transport in double-gate MOSFETs with complex band structure," Electron Devices, IEEE Transactions on, 50, 6: pg. 1511-1516, 06. 1557-9646. (DOI: 10.1109/TED.2003.813348).
Fonseca, J.; Kaya, S. (2003), "Simulation of interface roughness in DG-MOSFETs using non-equilibrium Green's functions," Semiconductor Device Research Symposium, 2003 International: pg. 512--513, 12.
Turk, Z.; Cerovsek, T.; Stankovski, V. (2003), "D24: Guide for tools and services delivery," ICCI, 12.
Beckett, P. (2003), "Exploiting Multiple Functionality for Nano-Scale Reconfigurable Systems," Great Lakes Symposium on VLSI: pg. 50-55. 1-58113-677-3.
Affiliated authors
-
Cantley, K.D.; Liu, Y.; Pal, H.S.; Low, T.; Ahmed, S.S.; Lundstrom, M.S. (2007), "Performance Analysis of III-V Materials in a Double-Gate nano-MOSFET," Electron Devices Meeting, 2007, IEDM 2007, IEEE International: pg. 113-116, 12. 978-1-4244-1508-3.
-
Ahmed, S.S.; Klimeck, G.; Kearney, D.; McLennan, M.; Anantram, M.P. (2007), "Quantum Simulations of Dual Gate MOSFET Devices: Building and Deploying Community Nanotechnology Software Tools on nanoHUB.org," International Journal of High Speed Electronics and Systems, 17, 3: pg. 485-494, 09.
-
Lundstrom, M.S.; Klimeck, G. (2006), "The NCN: Science, Simulation, and Cyber Services," Emerging Technologies - Nanoelectronics, 2006 IEEE Conference on: pg. 496--500, 01.
-
Ananthan, H.; Roy, K. (2006), "A Compact Physical Model for Yield Under Gate Length and Body Thickness Variations in Nanoscale Double-Gate CMOS," Electron Devices, IEEE Transactions on, 53, 9: pg. 2151-2159, 09.
-
Zhao, M.; Figueiredo, R.J. (2006), "Application-Tailored Cache Consistency for Wide-Area File Systems," Distributed Computing Systems, 2006. ICDCS 2006. 26th IEEE International Conference on: pg. 41, 07.
-
Rahman, A.; Klimeck, G.; Lundstrom, M.S. (2005), "Novel channel materials for ballistic nanoscale MOSFETs-bandstructure effects," Electron Devices Meeting, 2005. IEDM Technical Digest. IEEE International: pg. 4, 12.
-
Fortes, J.A.B.; Figueiredo, R.J.; Lundstrom, M.S. (2005), "Virtual computing infrastructures for nanoelectronics simulation," Proceedings of the IEEE, 93, 10: pg. 1839--1847, 10.
-
Ravishankar, R.; Kathawala, G.; Ravaioli, U.; Hasan, S.; Lundstrom, M.S. (2005), "Comparison of Monte Carlo and NEGF simulations of double gate MOSFETs," Journal of Computational Electronics, 4, 1-2: pg. 39-43, 04. (DOI: 10.1007/s10825-005-7104-y).
-
Rahman, A.; Lundstrom, M.S.; Ghosh, A.W. (2005), "Generalized effective-mass approach for n-type metal-oxide-semiconductor field-effect transistors on arbitrarily oriented wafers," Journal of Applied Physics, 97, 053702.
-
Wang, J.; Lundstrom, M.S. (2005), "Device Physics and Simulation of Silicon Nanowire Transistors" (PhD Thesis), Purdue University, 08.
-
Rahman, A.; Lundstrom, M.S. (2005), "Exploring New Channel Materials for Nanoscale CMOS Devices: A Simulation Approach" (PhD Thesis), Purdue University.
-
Wang, J.; Polizzi, E.; Lundstrom, M.S. (2003), "A computational study of ballistic silicon nanowire transistors," Electron Devices Meeting, 2003. IEDM '03 Technical Digest. IEEE International: pg. 29.5.1-29.5.4, 12. 0-7803-7872-5. (DOI: 10.1109/IEDM.2003.1269375).
-
Rahman, A.; Ghosh, A.W.; Lundstrom, M.S. (2003), "Assessment of Ge n-MOSFETs by quantum simulation," Electron Devices Meeting, 2003. IEDM '03 Technical Digest. IEEE International: pg. 1941--1944, 12.
-
Goasguen, S.; Venugopal, R.; Lundstrom, M.S. (2003), "Modeling transport in nanoscale silicon and molecular devices on parallel machines," Nanotechnology, 2003. IEEE-NANO 2003. 2003 Third IEEE Conference on, 1: pg. 398--401, 08.
-
Rahman, A.; Guo, J.; Datta, S.; Lundstrom, M.S. (2003), "Theory of ballistic nanotransistors," Electron Devices, IEEE Transactions on, 50, 9: pg. 1853--1864, 09.
-
Ren, Z.; Venugopal, R.; Goasguen, S.; Datta, S.; Lundstrom, M.S. (2003), "nanoMOS 2.5: A two-dimensional simulator for quantum transport in double-gate MOSFETs," IEEE Transactions on Electron Devices, 50, 9: pg. 1914--1925, 09.
-
Lundstrom, M.S. (2003), "Device physics at the scaling limit: what matters? [MOSFETs]," Electron Devices Meeting, 2003. IEDM '03 Technical Digest. IEEE International: pg. 3311--3314, 12.
-
Low, T.; Hou, Y.T.; Li, M.F.; Zhu, Chunxiang; Chin, A.; Samudra, G.; Chan, L.; Kwong, D.-L. (2003), "Investigation of Performance Limits of Germanium Double-Gated MOSFETs," IEEE International Electron Devices Meeting, 2003. IEDM '03 Technical Digest, 12. 0-7803-7872-5. (DOI: 10.1109/IEDM.2003.1269374).
-
Lundstrom, M.S.; Ren, Z. (2002), "Essential physics of carrier transport in nanoscale MOSFETs," Electron Devices, IEEE Transactions on, 49, 10: pg. 133--141, 01.
-
Parikh, C.D.; Lundstrom, M.S. (2002), "Electron transport in nanoscale bipolar transistors," 2002 2nd IEEE Conference on Nanotechnology.
-
Goasguen, S.; Butt, A.R.; Colby, K.D.; Lundstrom, M.S. (2002), "Parallelization of the nanoscale device simulator nanoMOS-2.0 using a 100 nodes linux cluster," Nanotechnology, 2002. IEEE-NANO 2002. Proceedings of the 2002 2nd IEEE Conference on: pg. 409--412, 08.
-
Ren, Z.; Venugopal, R.; Datta, S.; Lundstrom, M.S. (2001), "Examination of design and manufacturing issues in a 10 nm double gate MOSFET using nonequilibrium Green's function simulation," Electron Devices Meeting, 2001. IEDM Technical Digest. International: pg. 541--544, 12.
-
Rumsey, D.; Lundstrom, M.S. (2001), "Electrical Characterization of Bulk MOSFETs in Terms of Backscattering Coefficients" (Master's Thesis), Purdue University, 12.
Reviews
The following are reviews of this resource from other site members.
-
Posted on 03 June, 2008 by Oka Kurniawan
I couldn't run the ballistic NEGF. It gives me error
error no element found at line 18210
Hope this bug is fixed so that I can try it.
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