Contents
5 MB
md5:f46b12d70ed0ddb9419caa7b05d477eb
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JFETIDG Model for Independent Dual-Gate JFETs 1.0.3 Verilog-A
general_v1_0_1.va
26 KB
jfetidg_v1_0_3.va
73 KB
jfetidgIds_v1_0_1.va
20 KB
junction_v1_0_1.va
19 KB
simulatorFlags.va
688 B
Benchmarks
qaJfetidg
73 KB
qaJfetidgTemp
4 KB
reference.tar.gz
707 KB
Parameters
parameterSets
522 B
Manual
doc.tar.gz
170 KB
Miscellaneous/2016TED_JFETIDGpartI.pdf
2 MB
Miscellaneous/2016TED_JFETIDGpartII.pdf
3 MB
Miscellaneous/_00_README.txt
4 KB
gallery/crossSection.png
13 KB
gallery/equivalentCircuit.png
15 KB
LICENSE.txt
hubREADME.txt