nanoHUB-U Fundamentals of Nanotransistors/Lecture 1.7: Virtual Source Model ======================================== >> [Slide 1] Welcome back to Unit 1. So we're in the process of wrapping up this unit. In the last lecture, we developed a very simple traditional model of transistors, a 2-piece model that described the linear region and it described the saturated region. What I want to do in this lecture is to extend that into a simple version of a complete model and actually one that is rather widely used these days and it's called the virtual source model. And this is a model that we're going to use as a framework for our discussions in the rest of the course. So we'll come back to this throughout the course as we refine our techniques and add more detail to the model and we'll evolve this model into a better and better model and understand a little better what the physics of the model is. So the goal in this lecture is [Slide 2] to introduce this virtual source model. So we've been talking about the current voltage characteristics of a nanotransistor and our goal is to understand how we relate the current IDS, the current from the drain to the source as a function of the terminal voltages. And we'll mainly focus on how to gate the source voltage, controls the charge and channel and how the drain to source voltage controls the current. [Slide 3] All right so this is our generic IV characteristic for one specific gate voltage and we developed in the last lecture a very simple model that was really easy to do for the linear region current. Here's the expression. This is a classic textbook expression and it really works very well, and we also developed a simple model for the saturation region current for a short channel device. This is called the velocity saturation model and that was even easier to do. So we have this 2-piece model for the linear region and the saturated region. What we would like to do is to learn how to connect it from the linear region through to the saturation region and get a complete model that works well for any drain to source voltage. Now, first of all we'll note that there is a critical voltage, VDSAT. You have to drain the source voltages below VDSAT. Or in the linear region, you have to drain the source voltage that's higher than that and we're in the saturated region. We simply equate those two currents where the two currents are equal that defines VDSAT and we get a simple expression for the drain saturation voltage in terms of these parameters like the saturation velocity channel length and mobility. [Slide 4] All right so here's our basic model and we can express it this way. The current per unit width is basically just charge times velocity and it's charge in coulombs per square centimeter in the plane of the channel that we're talking about and then it's velocity in the X direction from the source to the drain. We have used a very simple model for the charge as a function of the gate to source voltage and we're going to talk about this in a lot more detail in Unit 2 when we discuss MOS electrostatics, but for now it's easy to accept I think for the time being that the model is just charge is capacitance times voltage, but we don't get a significant mobile charge that can carry the current from the source to the drain unless our gate voltage is at least the threshold voltage VT. And if the gate voltage is smaller than that, we'll just say the charge is approximately 0. The negative sign is because we're talking about an N channel MOSFET electrons have a negative charge. Now, if I have a small drain to source voltage, then this average velocity is just mobility times electric field. The electric field is just the voltage between the drain and the source divided by the channel length, volts per centimeter. If I have a large drain to source voltage, then we argue that the active field is very high. Conventional semi-conductor physics says that the velocity should saturate and we simply say that the average velocity now is the high field saturation velocity. We learn that when people do detail physical simulations that there's a lot more to it than that and we'll have to come back later in the course and talk about that a lot more, but this is our model so far. Now if we could just make the average velocity go from its value under low drain voltage to the right value under high drain voltage smoothly, then we would have a complete model [Slide 5] and that's what we aim to do. And there's an easy way to do that. So we can argue that whichever of those two velocities is the smallest that velocity will control, will limit the current. That will be the important one and the way we can do this is we can say one over the average velocity is one over the velocity in the linear regime plus one over the velocity in the saturation regime. Whichever one of those two velocities is smaller is going to dominate the overall average velocity. So we simply solve for the average velocity, we get an expression like this. If you collect up the constants, we have our previous expression for the drain saturation voltage. So we have a simple expression that is going to take the average velocity smoothly from the right value at the low drain voltage to the high drain voltage. I'm going to write this expression this way. I'm going to define a function called FSAT as a function of the drain source voltage and multiply it by VSAT. FSAT is just going to be this quantity in the brackets here, and we're going to write FSAT this way. And you notice I have done one more thing though. We've just added a parameter beta. So we said it's drain voltage over VDSAT to the power beta and then we've made everything downstairs to the power 1 over beta. That just gives us an extra empirical knob. We can tweak this. The physical justification comes from where we started here but now we have an extra empirical knob that we can adjust to make sure that we get the best fit to experimental data. So, beta is empirically fit to measure characteristics. It's typically 1.4 to 1.8 or so for silicon MOSFETs. So once you have a device technology you can adjust that and then it works pretty well for a variety of channel links within that technology. So we have an empirical expression [Slide 6] that will fit those two curves. Let's just take a look and make sure that it does the right thing. If I look at low drain to source voltage, then I can ignore the VDS/VSAT term in the denominator and this expression just goes to VD over VDSAT and if I plug in the expression for VDSAT there and work it all out, you'll see that my average velocity for small drain voltage is just mobility times electric field. Just what it should be so it does the right thing at the low field. If I look at the high field, at the high field I can ignore the one downstairs and then the beta and power one over beta cancel out and FSAT just goes to 1, the average velocity goes to the saturation velocity and that's the correct answer under high drain voltage. All right so we have an empirical function. It does the right thing at the two limits and it connects us smoothly in between those two limits. [Slide 7] And although this is just an empirical way to do it, it actually works remarkably well for a wide variety of transistors. Silicon MOSFETs of different types, III-V field-effect transistors even carbon nanotube and even graphene transistors. [Slide 8] So it seems to capture something important about transistors. So just to recap we started with our 2-piece model and now we have a way to connect it smoothly from the right answer at the low drain voltage to the right answer at the high drain voltage and we do that with this empirical drain saturation function FSAT. [Slide 9] Okay, now if you look at the model, we're still, it has a glearing weakness in one case. We know that any realistic device is going to have some finite slope in the saturation region. The current doesn't saturate exactly unless the channel is very, very long. So, we have a model where the current saturates exactly. That isn't going to work in practice. We need to do a little better than that, but it turns out it's easy to do better. The current here is charge times velocity. The velocity is saturated so it's not changing, but the charge if we look a little more closely is actually changing with drain voltage. Because you'll recall when I discussed device metrics and device parameters, the threshold voltage actually depends a little bit on the drain voltage. The higher the drain voltage the smaller the threshold voltage. This is this phenomenon we call DIBL. We didn't explain it, we simply defined what it was. We'll explain it in Unit 2. So, we have to include the fact that the threshold voltage is its value at low drain voltage minus some DIBL parameter times the drain to source voltage and that accounts for the fact that there is a drain voltage dependence. That drain voltage dependence means that as we increase the drain voltage, we get more and more charge. That gives us a finite output slope and in a well designed transistor, this describes the output resistance very well. [Slide 10] Now there's another important factor that we should consider in real devices. If we're trying to fit this through actual devices, we have to understand that we develop these expressions for the transistor, but it was the intrinsic transistor. We assume that the voltages were really applied right at the drain in the source and the gate of the device, but in a real device we have metal contacts and the metal contacts make contact to the silicon and there is some resistance between the metal contacts and the actual silicon and that series resistance affects the performance of the device and we have to account for that. Now, I haven't shown any series resistance in the gate. There actually is some resistance there too, but since the gate current, you know, we have a gate insulator so DC current is not flowing, there won't be any voltage drop across that resistance. So we don't have to worry about the gate resistance under DC conditions. It's important under AC conditions. But we do have to worry about the fact that there is some resistance between the actual metal contact that we apply the drain voltage to and now I've labeled That VD prime. That's the voltage that we actually apply. VD is the voltage that actually gets into the drain and that's going to be a little bit less because there will be some voltage drop across that resistor. Same thing is going on at the source. There is an intrinsic source. That's the one we've been talking about, but there is an extrinsic source where we actually apply the real voltage. So we have to make this correction and it's easy to do. So what we're interested in is the voltage that gets across the actual internal terminal of the device; that's the external voltage minus the voltage drop in the drain resistor. Same thing for the source. So, we can simply account for the effect of this series resistances by taking the, we can account for the effect of the series resistances by taking the model we developed and assuming that that model applies to the intrinsic device and then making these corrections after the fact for the external series resistances. [Slide 11] So it's something that's relatively easy to do. To see what effect that has on a transistor, this dash line here is maybe an IV characteristic of an intrinsic transistor. Here's the linear regime, here's the saturation regime, these are the expressions that we have developed. Now a real transistor with series resistance will look like this. So part of the reason it looks like this is in the low voltage and linear regime now we have a channel resistance. This was there for the intrinsic transistor to begin with but now we have a drain resistor and a source resistor in series with it. So the total resistance between the source and the drain is the resistance of the intrinsic transistor, which was in our model, plus these extra two resistors that are always there. Now, we also see that we get less saturation current. The reason we get less saturation current is if we apply voltage to the gate and apply a voltage to the drain and the source, the gate to source voltage is what controls the charge Q and that gate to source voltage is reduced because when current flows through the source series resistance, there is a positive voltage drop on that series resistance and it means the intrinsic sources is at a positive voltage. So the difference between the gate voltage and the intrinsic source is reduced and that means that the saturation current is also going to be reduced. So it's very important when analyzing experimental data to account for the fact that there are these series resistances, which are inevitably there. [Slide 12] So this is our simple model. I'm calling it level 0. It's actually too simple but as we go through the course we'll evolve it into a really quite good model. So the model expresses current as charge times velocity. That's always true. No approximation there. We use a very simple description of charge versus gate voltage. We're going to develop a much more accurate and sophisticated treatment in the next unit, but we simply say that there is charge there above threshold, there is no charge below threshold and we account for DIBL with a DIBL parameter delta. We modeled the transition from linear region to saturation region with this empirical drain saturation function. Here's the function that we developed, the parameter beta is an empirical parameter that we adjust to fit the data and then we have the drain saturation voltage which came out of our original model. So it's a very simple model. There are only 8 parameters in this model. Most of them have clear physical significance. This is the capacitance of the gate insulator, this is the threshold voltage of the transistor, this is the DIBL parameter of the transistor, this is the high field saturation velocity of electrons in silicon, this is the mobility of electrons, this is the channel length, these are the external series resistances and beta is this empirical parameter that we adjust so that the transition from linear to saturation behaves as the experimental data says that it should. [Slide 13] So it's really a quite simple model. Maybe the surprising thing is that how a slightly more sophisticated version of this model works remarkably well. So this is a model that has been developed at MIT. We'll call it the MIT virtual source model. And it does really a remarkably good job of fitting a wide range of data on different types of nanotransistors. So here you are seeing a typical fit that you would get to data from 32 nanometer silicon technology, and you can see with just a few physical parameters we can do a very good job of fitting the IV characteristics [Slide 14] of these transistors across a wide range of voltages. Now the thing that is a little bit mysterious here is you will recall that when we derive this model, we use very traditional concepts of semi-conductor physics and electron transport. Concepts that are well founded when we have long channel lengths, a micron long, 10 microns long, when the theory was first developed. What we saw when we looked at the detailed simulations is that there's some very serious issues with the physics in that problem. For example, there is no high field velocity saturation and we're not sure what mobility means when we get to very short channel lengths. That's a concept that is well defined for large volt chunks of silicon, but what people find is if we take the mobility in this model and the saturation velocity in this model and if we view them as adjustable parameters that can be tweaked to fit the experimental data, then we only have to tweak them a little bit to produce these remarkably good fits. So because we're tweaking these physical parameters, we'll call the mobility the apparent mobility and we'll call the saturation velocity the injection velocity. Now, you might think these are just fudge factors that we adjust to fit the data. It turns out they're much more than that. We can actually give physical significance to these new parameters and explain what they mean and that is really the point of this course. As we go through the course and our understanding of nanotransistors evolves, we'll come back to the virtual source model and we will develop a very clear physical understanding of what this apparent mobility is and what this injection velocity is. So that will be the subject of subsequent lectures. This virtual source model is something that we will carry with us throughout the remainder of the course and it will sort of be our framework for thinking about transistors as our understanding evolves. So thank you very much.