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Contributors: View

James Donald

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Contributions 2 (detailed usage)
Affiliation NVIDIA
Web Site http://www.princeton.edu/~jdonald/cad/projects.html

Contributions

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  1. Reed-Muller Reversible Logic Synthesizer (RMRLS) 0.2

    This resource has a 7.6 Ranking

    Ranking is calculated from a formula comprised of user reviews and usage statistics. Learn more ›

    Usage Stats
    Last 12 Months: updated 01 Jul, 2008
    Users: 19
    Reviews & Citations
    Google/IEEE
    Avg. Review: 0.0 out of 5 stars
    Citations: 0

    19 users

    0 reviews (Review this)

    0 citations

    08 Jan. 2008 | Downloads | Contributor(s): James Donald, Pallav Gupta

    Reed-Muller Reversible Logic Synthesis tool (a.k.a. RELOS) is a tool for the synthesis of reversible functions based on positive-polarity Reed-Muller expressions. The second release of RMRLS features reversible logic synthesis with SWAP, Fredkin, and Peres gates. This work was done under the …

  2. RMRLS 0.2

    This resource has a 7.6 Ranking

    Ranking is calculated from a formula comprised of user reviews and usage statistics. Learn more ›

    Usage Stats
    Last 12 Months: updated 01 Jul, 2008
    Users: 19
    Reviews & Citations
    Google/IEEE
    Avg. Review: 0.0 out of 5 stars
    Citations: 0

    19 users

    0 reviews (Review this)

    0 citations

    08 Jan. 2008 | Downloads | Contributor(s): James Donald, Pallav Gupta

    Reed-Muller Reversible Logic Synthesis tool (aka RELOS) is a tool for the synthesis of reversible functions based on positive-polarity Reed-Muller expressions. The second release of RMRLS a.k.a. RELOS features reversible logic synthesis with SWAP, Fredkin, and Peres gates.This work was done under …

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  • 1
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Results 1 - 2 of 2