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Wei Wang
| Contributions | 4 (detailed usage) |
|---|---|
| Affiliation | CNSE, University at Albany |
| Web Site | http://www.albany.edu/facultyresearch/nanodesign_group/ |
| Biography | Dr. Wei Wang is a faculty member of College of Nanoscale Science and Engineering, University at Albany. His research interests are hybrid CMOS/nano circuits, 3D IC and reconfigurable structures. |
Contributions
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CMOS-Nano Hybrid Technology: a nanoFPGA-related study
- This resource has a 7.5 Ranking
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Ranking is calculated from a formula comprised of user reviews and usage statistics. Learn more ›
Usage Stats Last 12 Months: updated 01 Oct, 2008 Users: 112 Reviews & Citations Google/IEEE Avg. Review: Citations: 0
112 users
04 Apr. 2007 | Online Presentations | Contributor(s): Wei Wang
Dr. Wei Wang received his PhD degree in 2002 from Concordia University, Montreal, QC, Canada, in Electrical and Computer Engineering. From 2002 to 2004, he was an assistant professor in the Department of Electrical and Computer Engineering, the University of Western Ontario, London, ON, Canada. …
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CNT Bundle
- This resource has a 8.6 Ranking
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Ranking is calculated from a formula comprised of user reviews and usage statistics. Learn more ›
Usage Stats Overall Period: Updated 07 Oct, 2008 Users: 352 Jobs: 1940 Avg. exec. time: 10 secs Reviews & Citations Google/IEEE: updated 22 Apr, 2008 Avg. Review: Citations: 1
352 users, detailed statistics
14 Mar. 2007 | Tools | Contributor(s): Sansiri Tanachutiwat, Wei Wang
This tool estimates the conductance and inductance of carbon nanotube bundles for interconnect applications. The analysis is based on the bundle structure of a mixture of multi-wall and single-wall carbon nanotubes, which is a realistic structure and significantly different from other theoretical …
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Exploring CMOS-Nano Hybrid Technology in Three Dimensions
- This resource has a 0.0 Ranking
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Usage Stats Last 12 Months: updated 01 Oct, 2008 Users: 0 Reviews & Citations Google/IEEE Avg. Review: Citations: 0
31 Mar. 2008 | Online Presentations | Contributor(s): Wei Wang
The CMOS-nano hybrid technology tries to utilize the advantages of both traditional CMOS and novel nanowire/nanotube structures, which will enhance IC performances in the near future and create breakthroughs in the long run. The CMOS-nano hybrid IC can be efficiently fabricated using the 3D …
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Graphene Multi-Layer Interconnect
- This resource has a 6.1 Ranking
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Ranking is calculated from a formula comprised of user reviews and usage statistics. Learn more ›
Usage Stats Overall Period: Updated 07 Oct, 2008 Users: 51 Jobs: 166 Avg. exec. time: 1 secs Reviews & Citations Google/IEEE Avg. Review: Citations: 0
13 Jun. 2008 | Tools | Contributor(s): Sansiri Tanachutiwat, Wei Wang, shuhong Liu
Estimate performances of graphene multi-layer interconnects